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cyr ustek co. ES5108 3 1/2 digit adc with serial output f eatur es multi-function measurement system : analog to digital con v erter . short circuit beeper . frequenc y counter . frequenc y counter , auto range from 2khz to 20mhz lo w battery detector . display hold and max/min. t riple x lcd display . full 3 1/2-digit display . annunciatorshold, max/min, khz, mhz, lo w-bat, continuance. 1 annunciator dri v e pin for unit display . 3 decimal point dri v ers with 3 independent control pins. polarity dri v er . displays "ol" for input o v er range. pro vides serial data output. guaranteed zero reading with zero input. t rue polarity indication for precision null detec- tion. con v enient 9v battery operation. lo w noise a/d con v erter: dif ferential inputs, 1pa bias current. dif ferential reference for ratiometric ohms. on-chip v oltage reference,
c drift. lo w linearity error . description the ES5108 is design for 3 1/2-digit digital multi- meter which combines an inte grated a/d con v erter , max/min, hold, short circuit beeper , lo w battery de- tector , a frequenc y counter , and serial data output. a 'hold' input allo ws the ES5108 to hold the cur - rent a/d readout or frequenc y readout. the frequenc y counter is auto-ranging from 2khz to 20mhz o v er a ? v e decade range with khz and mhz annunciators. short circuit beeper will sound whene v er the readout is less than 30 after enabling the short circuit beeper . this feature is useful in detecting short circuits without w atching the lcd. the ES5108 pro vides 3 independent decimal point dri v- ing pins for the manuf acturer to determine which deci- mal point or unit is display , the 3 decimal point dri v ers are b uilt-in ES5108. a pplication digital panel meters, digital multimeters, thermome- ters, capacitance meters, ph meters, photometers, etc. 1 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output block diagram ! " # ! " $ ! % " & ' ( ) * + ( ! & " & & & , & $ & - $ - & . . * & ! ! , & $ " & " % / - . ! - . ! 0 1 2 3 4 5 6 7 & ! " ! # % - % 8 % 8 9 9 9 & " # ! " $ - & . . " ! " % " 2 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output pin assignment 1 qfp-48pin 10 11 12 1 2 3 4 5 6 7 8 9 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 37 48 38 39 40 41 42 43 44 45 46 47 a3/g3/d3 b3/c3/dp2 hold/f2/e2 a2/g2/d2 b2/c2/dp1 a1/g1/d1 max/f1/e1 b1/c1/bat com1 com2 freq-in com3 sdo bzinn eoc v- vint vin+ freq/volt int osc1 v+ khz/f3/e3 cont/-/mhz osc2 osc3 dgnd vref+ vref- b4/c4/dp3 dint clk bzins bzout lb hold max reset dp3 dp2 dp1 annunc cref+ vbuff cref- caz vin- ana-com ES5108f 3 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output 2 ssop-48pin vint v- eoc bzinn sdo clk bzins bzout lb hold freq/volt v+ khz/f3/e3 a3/g3/d3 b3/c3/dp2 hold/f2/e2 a2/g2/d2 b2/c2/dp1 min/b4c4/dp3 cont/-/mhz 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 ES5108s com1 com2 com3 dint annunc dp2 dp3 max/min b1/c1/bat vbuff caz vin- vin+ ana-com cref- cref+ vref- vref+ dgnd osc3 osc2 osc1 int freq-in dp1 reset max/f1/e1 a1/g1/d1 4 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output pin description pin no. symbol t ype description 1 vref- - lo w dif ferential reference input connection. 2 vref+ - high dif ferential reference input connection. 3 dgnd - pull high to v+ all lcd se gments will be acti v ated. 4 osc3 - crystal oscillator connection.(rc) 5 osc2 - crystal oscillator connection.(input) 6 osc1 - crystal oscillator connection.(output) 7 int o inte gration status ag. 8 freq/v ol t i frequenc y counter/v oltage measurement select pin. connecting to v+ will enable the frequenc y counter , connecting to test1 or open will e x- ecute v oltage measurement. this pin is internally pull do wn to test1. 9 v+ p positi v e supply v oltage. : 10 cont/-/mhz o lcd se gment dri v e. (continuity ., polarity , mhz) 11 b4/c4/dp3 o lcd se gment dri v e. (b4, c4, decimal point3) 12 khz/f3/e3 o lcd se gment dri v e. (khz, f3, e3) 13 a3/g3/d3 o lcd se gment dri v e. (a3, g3, d3) 14 b3/c3/dp2 o lcd se gment dri v e. (b3, c3, decimal point2) 15 hold/f2/e2 o lcd se gment dri v e. (data hold, f2, e2) 16 a2/g2/d2 o lcd se gment dri v e. (a2, g2, d2) 17 b2/c2/dp1 o lcd se gment dri v e. (b2, c2, decimal point 1) 18 max/f1/e1 o lcd se gment dri v e. (max, f1, e1) 19 a1/g1/d1 o lcd se gment dri v e. (a1, g1, d1) 20 b1/c1/b a t o lcd se gment dri v e. (b1, c1, lo w battery) 21 com1 o lcd common dri v e#1. 22 com2 o lcd common dri v e#2. 23 com3 o lcd common dri v e#3. 24 freq-in i frequenc y counter input pin. 25 dint o de-inte gration status ag. 26 annunc o square w a v e output at the lcd backplane frequenc y , synchronized to com1. connecting an lcd se gment to annunc pin turns it on; con- necting to backplane turns it of f. 27 dp1 i 1st decimal point selection input for v oltage measurement, internally pulled-do wn to test1. 28 dp2 i 2nd decimal point selection input for v oltage measurement, internally pulled-do wn to test1. 29 dp3 i 3rd decimal point selection input for v oltage measurement, internally pulled-do wn to test1. 30 reset i reset input pin. connecting to v+ will cancel both max/min and hold functions. 31 max i max input pin. pulse to v+ to enable max function. 32 hold i hold input pin. connecting to v+ for hold function. 33 lb o lo w battery ag. pull high if lo w battery . 34 bzout o piezo b uzzer output. dri ving a b uzzer at 2.5khz audio frequenc y . 35 bzins i buzzer control sla v e input. 36 clk i external clock input pin for serial data accessing. 37 sdo o serial data output pin. continued on ne xt page ;
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; < this table is for ES5108f 5 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output ;=;
; continued from pre vious page pin no. symbol t ype description 38 bzinm i buzzer control master pin. 39 eoc o end of con v ersion indicator . 40 v - p ne gati v e supply v oltage. connecting to battery ne gati v e terminal. 41 vint - inte grator output. 42 vb uff - inte gration re gister connection. 43 caz - auto-zero capacitor connection. 44 vin- i analog lo w input signal. 45 vin+ i analog high input signal. 46 an a-com o set the common-mode v oltage for the system. 47 cref- - ne gati v e capacitor connection for on-chip a/d con v erter . 48 cref+ - positi v e capacitor connection for on-chip a/d con v erter . note: 1. -/mhz for ES5108s absolute maximum ratings characteristic rating supply v oltage (v+ to v -) 12v analog input v oltage (either input) v+ to v - reference input v oltage (either input) v+ to v - clock input dgnd to v+ po wer dissipation(plastic package) 800mw operating t emperature c to >@? c storage t emperature abdc c to ef c lead t emperature (soldering, 10sec) gd? c electrical characteristics p arameter symbol t est condition min. t yp. max. units dc characteristics zero in- put reading ? hjilknmop; dq , full- scale=200.0mv -000.0 rsd; +000.0 digital reading ratiometric reading ? h ilk = hutwvyx , hjtzvyx =100mv 999 999/1000 1000 digital reading linearity (max. de viation from best straight line t) ? full-scale=200mv or full-scale=2.000v -1 rsp;[g 1 counts roll-o v er error ? a\h ilk = >uh i]k ^ 200.0mv -1 rsp;[g +1 counts common mode rejection ratio ? hu_w` = r 1v , huilk =0v full-scale=200.0mv ? 50 ? a v/v lo w battery ag ? v+ to v - 6.6 6.9 7.2 v noise ? hjilk m dq , full- scale=200.0mv ? 15 ? a vp-p input leakage current ? h ilk mbdq ? 1 10 pa zero reading drift ? hjilk m dq , c cbdfegcu>@? c ? 0.2 1 a v/ c continued on ne xt page ;
;=; 6 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output ;=;
; continued from pre vious page p arameter symbol t est condition min. t yp. max. units analog common v oltage (with respect to v h ) ? 25k i between common and posi- ti v e supply 2.8 3.0 3.2 v analog common t emper - ature cof cient ? 25k i between common and hjh , c c t a ck?l c ? 60 75 ppm/ c se gment dri v e v oltage ? hjh to hnm =9v 4 5 6 v back plane dri v e v oltage ? hjh to hnm =9v 4 5 6 v supply current (does not include common current) ? h ilk =0v ? 1.2 1.6 ma frequenc y counter input le v el ? qwoqpsrtqwuwvyx{z q h a|ed; c ? ? v q oq}y~lf?d???? dgnd +1.5 input terminals : bzinm, bzins, max/min, hold, reset , freq/v ol t , clk, dp1, dp2, dp3 input logic high v oltage ? q?h?a|ed; c ? ? v input logic lo w v oltage ? dgnd +1.5 pull do wn current ? q oq? = q h ? 5 ? a a a c characteristics characteristics symbol min. t yp. max. unit lcd display frequenc y ??????? ? 167 ? hz operating frequenc y ? ???]????? ? 40 ? khz buzzer dri v e frequenc y ?????????=? ? 2.5 ? khz freq-in w a v eform rising t ime ?w?f? ? ? 20 ns freq-in w a v eform f alling t ime ?w??? ? ? 20 ns freq-in w a v eform pulse w idth ?w??? 17 ? ? ns clock delay t ime ? ? 1 ? 5000 a s data set-up t ime ?y??? ? ? 500 ns eoc pulse w idth ?w? ??? ? ? 10 ms clock pulse w idth ? ??? 500 ? ? ns max/min duration ?w?= 0.8 ? ? sec max/min and hold k e ys k e y debounce time ?w? ? ? ? 32 38 ms k e y hold time ? ?? 50 ? ? ms 7 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output 3 t iming w a v ef orms | ? a ? ? - ? ? a | a ? 2 3 ? | ? ? 1 ? ? o ? o ? ? ? | ? 3 ? 3 3 ? ? a a a a a a ? ? ? ? ? ? ? ? ? ? ? e ? ? e ? ? ? a a a functional description 1 analog common the common pin is used to set the common-mod v oltage for the system in which the input signals are oating with respect to the po wer supply of the ES5108. in most of the applications, vin-, vref- and common pins are tied to the same point, so that the common mode v oltage can be remo v ed from the reference system and the con v erter . in some applictions, vin- may not at the same point with common and thus a common mode v oltage e xists in the system, the high cmrr(86db typical) of the ES5108 can tak e care of this common mode v oltage. ne v ertheless, it should be care to pre v ent the output of the inte grator from saturation. the common pin is also used as a v oltage reference. it sets a v oltage of around 2.9 v olts more ne gati v e than the positi v e supply . the common v oltage of ES5108 has a lo w output impedance of e?ci typical. the analog common is tied internally to an n-channel fet capable of sinking 30ma. this fet will hold the com- mon v oltage at 2.9 v olts when an e xternal load attempts to pull the common v oltage to w ard the positi v e supply . the source current of common is only 10 a a, so it is easy to pull common v oltage to a more ne gati v e v oltage with respect to the positi v e supply . when the total supply v oltage is lar ge enough to cause the zener to re gulate(>7v), the common v oltage will ha v e a lo w temperature coef cient typically less than d? w? c. this v oltage can be used to generate the ES5108 reference v oltage and ane xternal v oltage reference will be unnecessary in most cases. 8 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output 2 refer ence v oltage f or a 1000 counts reading, the input signal must be equal to the reference v oltage. as a result, it requires the input signal be twice the reference v oltage for a 2000 counts full-scale reading. thus, for the 200.0mv and 2.000v full-scale, the reference v oltage should equal 100.0mv and 1.000v , in some applications the full-scale input v oltage my be other than 200mv or 2v , b ut 600mv . f or e xample, the reference v oltage should be set to 300mv and the input signal can be used directly without being di vided. the dif ferential reference can be used during the measurement of resistor by the ratiometric method and when a digital reading of zero is desired for q?]? m 0. a compensating of fset v oltage can be applied between common and vin- and the v oltage of being measured is connected between common and vin+. 3 system t iming the oscillator frequenc y is di vided by four prior to clocking the internal decade counters. the signal inte grate tak es a x ed 1000 counts time period which is equal to 4000 clock pulses. the backplane dri v e signal is deri v ed from di viding clock frequenc y by 240. t o mak e a maximum rejection of line frequenc y(60hz or 50hz)noise pickup, the signal inte grate period should be a multiple of the line frequenc y period. f or 60hz-noise rejection, oscillator frequencies of 120khz, 80khz, 60khz, 48khz, 40khz, etc. should be selected. f or 50hz rejection, oscillator frequencies of 100khz, 50khz, 40khz, etc. w ould be suitable. f or all ranges of frequenc y ?q??? should be 100k i , ???y? is selected from the approximate equation f ^ 0.45/rc. f or 48khz clock (3reading/second), ????? =100pf . 4 integrating resistor the input b uf fer amplier and inte grator both ha v e class a output stage with 100 a a of quiescent current and can supply 20 a a dri v e currents with ne gligible linearity errors. the inte grating resistor should be chosen to remain in the output stage linear dri v e re gion. it should be noticed that the inte grating resistor should not be so lar ge such that the leakage currents of printed circuit board will induce errors. f or a 200mv full-scale the recommended inte grating resistor v alue is 47k i and for 2v full-scale is 470k i . 5 integrating capacitor the inte grating capacitor should be selected to maximize inte grator output v oltage swing without causing output satura- tion. if the analog common is used as v oltage reference, a r 2v full-scale inte grator output swing is satisf actory . f or 3 readings/second (48khz clock) a 0.22 a f v alue of ot?f? is suggested. when dif ferent oscillator frequencies are used, ot?f? must be changed in in v erse proportion to maintain the nominal r 2v inte grator swing. the inte grating capacitor should ha v e lo w dielectric absorption to minimize roll-o v er error . an ine xpensi v e polyprop y- lene capacitor will w ork well. 6 a uto-zer o capacitor the auto-zero capacitor size has some inuence on system noise. a 0.47 a f capacitor is recommended for 200mv full scale where noise is v ery important. a 0.047 a f capacitor is adequate for 2v full-scale applications. a mylar type dielectric capacitor is adequate. 7 refer ence v oltage capacitor when vin- is tied to analog common, a 0.1 a f capacitor adequate to be the reference capacitor . if a lar ge common-mod v oltage e xists and the application requires a 200mv full scale, a lar ger v alue is required to pre v ent roll-o v er error . a 1.0 a f capacitor will hold the roll-o v er error to 0.5 count. 9 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output 8 test the test pin is tied to the internally generated digital supply . it' s potential is 5v less than q h . thus test may be used as the ne gati v e po wer supply connection for e xternally generated se gment dri v ers. if test is pulled lo w to qm all se gments plus the minus sign will be acti v ated and the display should read -1888. f or such operation, the se gment has a constant dc v oltage and may destro y the lcd display if left in this mode for se v eral minutes. 9 fr equency counter the ES5108 pro vides 2khz to 2mhz v e-decade auto-range frequenc y counter . in the counter mode, pulses at the freq-in will be counted and displayed. the frequenc y counter deri v es its time base from the clock oscillator and gets one readout persecond. the frequenc y counter accurac y is determined by the oscillator accurac y . f or accurate frequenc y measurement, a 40khz quartz crystal oscillator is recommended. the decimal points are automatically set to frequenc y mode.see follo wing table : freq-in decimal point annunciator 0khz to 1.999khz dp3 khz 2.0khz to 19.99khz dp2 khz 20khz to 199.9khz dp1 khz 200khz to 1999khz none khz 2.0mhz to 19.99mhz dp2 mhz 20mhz or more displa y "ol" 10 hold, max and max/min "hold" function will hold the current readout and con v erter operation. "max" function in ES5108f will display the maximum v alue. "max/min" function in ES5108s has tw o mode : max and min. when the max/min is pressed for the rst time, the meter displays the maximum v alue. when the max/min is pressed again, the meter displays the minimum v alue. the meter returns to normal mode if the max/min is pressed more then one seconds. 11 serial data output the ES5108 pro vides serial data output for use in connection with microcontrollers. during this operation, ES5108 uses clk, sdo and eoc pins. the follo wing is the timing diagram of this connection. the eoc pin will be pulled high at the end of con v ersion and the content of serial output data b uf fer will update simul- taneously . the w a v eform of eoc pin will go lo w as soon as clk pin recei v es clock signal.otherwise the eoc pin will stay high and then go lo w in 10ms. serial data output format : d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 lsb msb 1. v oltage mode : (a) d0(polarity) : '1' for '+' and '0' for '-' (b) d1(msd) : '1' for msd = 1 and '0' for msd = 0 (c) d2 to d5 for 3rd lsd(from 0000 to 1001). (d) d6 to d9 for 2nd lsd(from 0000 to 1001). (e) d10 to d13 for 1st lsd(from 0000 to 1001). (f) d14 and d15 for decimal points bits : '00' for none, '01' for dp1, '10' for dp2, '11' for dp3. 10 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output 2. frequenc y mode (a) d0(khz/mhz) : '1' for mhz and '0' for khz. special data format items d15...d6 d5 d4 d3 d2 d1 d0 initial state(0000) random and don' t care 1 1 1 1 1 1 positi v e ov ero w(ol) random and don' t care 0 0 1 1 1 1 ne gati v e ov ero w(-ol) random and don' t care 0 0 1 1 1 0 12 lcd segment dri v ers the ES5108 dri v es a triple x lcd with three commons. this lcd includes 3 1/2-digits, three decimal, points polarity sign and annunciators for peakhold, data-hold, continuity , frequenc y and lo w battery . the follo wing gure indicates the assignments of the display se gments to the commons and se gment dri v e lines. 12.1 ES5108f pin no. com1 com2 com3 10 cont ? mhz 11 b4 c4 dp3 12 khz f3 e3 13 a3 g3 d3 14 b3 c3 dp2 15 hold f2 e2 16 a2 g2 d2 17 b2 c2 dp1 18 max f1 e1 19 a1 g1 d1 20 b1 c1 b a t 21 com1 ? ? 22 ? com2 ? 23 ? ? com3 12.2 ES5108s pin no. com1 com2 com3 3 cont ? mhz 4 min b4/c4 dp3 5 khz f3 e3 6 a3 g3 d3 7 b3 c3 dp2 8 hold f2 e2 9 a2 g2 d2 10 b2 c2 dp1 11 max f1 e1 12 a1 g1 d1 13 b1 c1 b a t 14 com1 ? ? 15 ? com2 ? 16 ? ? com3 11 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output the lcd w a v eform is as follo ws a ? ? a ? ? a ? ? ? ? ? ? ? e ? ? a ? ? ? e ? ? ? a ? ? ? a e ? ? e ? ? ? a ? ? ? e ? ? ? a ? ? ? a e ? ? e ? ? ? a ? ? ? ? e ? a ? ? ? ? y ? ? ? ? y ? ? ? ? y ? ? ? ? y ? ? ? ? y ? ? ? ? y ? ? ? ? y ? ? ? ? y the annunciator output is a square w a v e running at the lcd backplane frequenc y (e x. 167hz for ?????]????? =40khz.) the pk- pk amplitude is equal to (v+ ?dgnd.) connecting an annunciator of the lcd to the annunc pin turns the annunciator on; connecting it to common turns it of f. 12 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output t est cir cuit cref+ vint vbuff caz vin+ vref- v+ osc3 osc2 osc1 100k 24k 1k 5 6 100pf v- vref+ ana-com 9v vin- + - input analog 1m 0.01uf caz rint cint cref- 0.1uf test bzout bzins hold dp1 dp2 dp3 reset 44 45 43 42 41 48 47 3 46 1 2 9 40 4 32 35 34 31 30 29 28 27 annunc lcd driver lcd display 10 23 26 + - dgnd buzzer piezo 1nf max ES5108f 13 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output a pplication cir cuit 22m w cref+ vint vbuff caz vin+ vref- v+ 24k 1k v- vref+ ana-com 9v vin- + - input analog 1m 0.01uf caz rint cint cref- 0.1uf dp1 dp2 dp3 reset 44 45 43 42 41 48 47 46 1 2 9 40 30 29 28 27 + - 31 32 bzins 35 test 3 dgnd piezo buzzer 34 bzout bzinm 38 10 lcd driver 23 lcd display 26 6 osc1 freq/volt annunc (frequence) (voltage)open clk eoc sdo 36 37 39 uc 1nf 4/8-bit hold max ES5108f osc2 5 crystal 220pf 24 fin freq-in 40 khz 14 july 4, 2002
cyr ustek co. ES5108 3 1/2 digit adc with serial output p ackaging 1 qfp 48pin 12 48 37 1 36 25 24 13 d h d e b e h e e g seating plane see detail f l1 g d d g c l d a1 a2 a y detail f symbol dimensions in inches dimensions in mm a a1 a2 + + + 0.004 - 0.002 + b 0.013 + 0.004 -0.002 0.006 0.10 + 0.05 0.15 c 0.33 0.10 0.05 0.10 2 0.10 min 2.25 max 0.089 max 0.004 min 0.079 0.004 0.394 0.002 + 10.0 + 0.05 d e 0.394 0.002 + + 10.0 0.05 e 0.030 + 0.006 0.75 + 0.15 g d 0.524 nom 13.3 nom g e 0.524 nom 13.3 nom h d 0.590 + 0.008 15.00 + 0.20 h e 0.590 + 0.008 15.00 + 0.20 l 0.067 + 0.004 + 1.70 0.10 l1 0.098 + 0.004 2.50 + 0.10 y 0.006 max. 0.15 max 0 - 15 0 - 15 note : 1. dimensions d&e do not include resin lins. e 2. dimensions g &g are for pc board surface mount pad pitch design reference only. d unit : inches/mm ES5108f 15 july 4, 2002

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